发明名称 |
Method to achieve true fail safe compliance and ultra low pin current during power-up sequencing for mobile interfaces |
摘要 |
An input/output (IO) circuit powered by an input/output (IO) supply voltage. The IO circuit includes a supply detector cell that detects a core supply voltage and generates a supply detect signal. A driver circuit is connected to a PAD and the driver circuit receives the supply detect signal. A failsafe circuit receives a PAD voltage. The failsafe circuit and the supply detector cell controls a leakage current from the PAD based on the IO supply voltage and the PAD voltage. |
申请公布号 |
US9000799(B1) |
申请公布日期 |
2015.04.07 |
申请号 |
US201314043565 |
申请日期 |
2013.10.01 |
申请人 |
Texas Instruments Incorporated |
发明人 |
Rajagopal Devraj Matharampallil;P Rajagopalan |
分类号 |
H03K19/007;H03K19/0185 |
主分类号 |
H03K19/007 |
代理机构 |
|
代理人 |
Pessetto John R.;Cimino Frank D. |
主权项 |
1. An input/output (IO) circuit powered by an input/output (IO) supply voltage comprising:
a supply detector cell configured to detect a core supply voltage and generate a supply detect signal; a driver circuit connected to a PAD and configured to receive the supply detect signal; and a failsafe circuit configured to receive a PAD voltage, wherein the failsafe circuit and the supply detector cell are configured to control a leakage current from the PAD based on the IO supply voltage and the PAD voltage. |
地址 |
Dallas TX US |