发明名称 METHOD TO ACHIEVE TRUE FAIL SAFE COMPLIANCE AND ULTRA LOW PIN CURRENT DURING POWER-UP SEQUENCING FOR MOBILE INTERFACES
摘要 An input/output (IO) circuit powered by an input/output (IO) supply voltage. The IO circuit includes a supply detector cell that detects a core supply voltage and generates a supply detect signal. A driver circuit is connected to a PAD and the driver circuit receives the supply detect signal. A failsafe circuit receives a PAD voltage. The failsafe circuit and the supply detector cell controls a leakage current from the PAD based on the IO supply voltage and the PAD voltage.
申请公布号 US2015091608(A1) 申请公布日期 2015.04.02
申请号 US201314043565 申请日期 2013.10.01
申请人 Rajagopal Devraj Matharampallil;P. Rajagopalan 发明人 Rajagopal Devraj Matharampallil;P. Rajagopalan
分类号 H03K19/007;H03K19/0185 主分类号 H03K19/007
代理机构 代理人
主权项 1. An input/output (IO) circuit powered by an input/output (IO) supply voltage comprising: a supply detector cell configured to detect a core supply voltage and generate a supply detect signal; a driver circuit connected to a PAD and configured to receive the supply detect signal; and a failsafe circuit configured to receive a PAD voltage, wherein the failsafe circuit and the supply detector cell are configured to control a leakage current from the PAD based on the IO supply voltage and the PAD voltage.
地址 Bangalore IN