发明名称 ESTIMATION OF EFFECTIVE CHANNEL LENGTH FOR FINFETS AND NANO-WIRES
摘要 Roughly described, a system for estimating an effective channel length of a 3D transistor having a gate length below 20 nm involves estimating an effective volume of the channel and a cross-sectional area of the channel, and estimating the effective channel length as the ratio of effective volume to cross-sectional area. Preferably the effective volume is estimated as the sum of the Voronoi volumes within containing boundaries of the channel, excluding those volumes having a dopant concentration above the source/drain dopant concentration at the carrier injection point. The containing boundaries can be identified using geometry data describing the transistor, particularly the data identifying inner surfaces of the gate dielectric. The estimated effective channel length can be used in TCAD level analysis of the transistor and calculating characteristics of the transistor as needed for circuit simulation.
申请公布号 WO2015048400(A1) 申请公布日期 2015.04.02
申请号 WO2014US57637 申请日期 2014.09.26
申请人 SYNOPSYS, INC. 发明人 MOROZ, VICTOR;OH, YONG-SEOG;SMITH, STEPHEN, LEE;SHAUGHNESSY-CULVER, MICHAEL, C.;LIU, JIE
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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