发明名称 SEMICONDUCTOR ARRAY HAVING TEMPERATURE-COMPENSATED BREAKDOWN VOLTAGE
摘要 A semiconductor array is described whose breakdown voltage has only a very low temperature coefficient or none at all and therefore there is little or no temperature-dependent voltage rise. The voltage limitation is achieved by a punch-through effect.
申请公布号 US2015091125(A1) 申请公布日期 2015.04.02
申请号 US201414504965 申请日期 2014.10.02
申请人 GOERLACH Alfred;Qu Ning 发明人 GOERLACH Alfred;Qu Ning
分类号 H01L27/06;H01L29/06;H01L29/732;H01L29/16;H01L29/872;H01L29/73 主分类号 H01L27/06
代理机构 代理人
主权项 1. A semiconductor array, comprising: a first metal layer arranged as a cathode; a highly n-doped silicon layer contacted with the first metal layer; an additional n-doped silicon layer contacted with the highly n-doped silicon layer; and an additional metal layer connected to the additional n-doped silicon layer and arranged as an anode, wherein: trenches are introduced into the additional n-doped silicon layer, the trenches having edge regions filled with a p-doped silicon layer, the trenches having an interior region filled with highly p-doped silicon,the edge regions of the trenches are contacted with the additional metal layer via a highly p-doped layer that forms an ohmic contact with the additional metal layer,the additional metal layer forms Schottky diodes with the additional n-doped layer,the highly p-doped internal regions of the trenches form npn transistors together with the edge regions of the trenches and the additional n-doped layer,the additional n-doped layer is arranged as a collector region,the highly p-doped internal regions of the trenches are arranged as emitter regions,the edge regions of the trenches function as base regions, anda limitation of reverse voltages for diode-forming collector-base junctions is determined by a punch-through effect.
地址 Kusterdingen DE