Dielectric solder barrier for semiconductor devices

摘要

The present disclosure relates to a dielectric solder barrier for a semiconductor die. In one embodiment, a semiconductor die includes a substrate, a semiconductor body on a first surface of the substrate, one or more first metallization layers on the semiconductor body opposite the substrate, a via that extends from a second surface of the substrate through the substrate and the semiconductor body to the one or more first metallization layers, and a second metallization layer on the second surface of the substrate and within the via. A portion of the second metallization layer within the via provides an electrical connection between the second metallization layer and the one or more first metallization layers. The semiconductor die further includes a dielectric solder barrier on the second metallization layer. Preferably, the dielectric solder barrier is on a surface of the portion of the second metallization layer within the via.

主权项

1. A semiconductor die comprising:
a substrate having a first surface and a second surface; a semiconductor body on the first surface of the substrate; one or more first metallization layers on the semiconductor body opposite the substrate; a via that extends from the second surface of the substrate through the substrate and the semiconductor body to the one or more first metallization layers; a second metallization layer on the second surface of the substrate and within the via such that a portion of the second metallization layer within the via provides an electrical connection between the second metallization layer and the one or more first metallization layers; and a dielectric solder barrier comprising one or more oxide layers on the second metallization layer.