| 摘要 |
A reconfigurable semiconductor integrated circuit according to a first embodiment is equipped with a plurality of memories, and a logic circuit which is connected in parallel to the plurality of memories, and by which logic is determined according to the data output of the plurality of memories. A signal output unit is equipped with a plurality of output terminals which output either a selection signal which outputs data to a logic circuit or a non-selection signal which closes data output, for each of the plurality of memories, and outputs a selection signal and a non-selection signal from each of the plurality of output terminals in turn. A switch unit sets, to an open state or a closed state, the path between a first output terminal from a plurality of output terminals and a second output terminal which is cycled through, skipping at least one output terminal with respect to the first output terminal. |
