发明名称 Multi-patterning method and device formed by the method
摘要 A multi-patterning method includes: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate, wherein each spacer defines a pattern-free region adjacent to a respective one of the at least two first circuit patterns, and patterning a second circuit pattern in the hard mask layer using a second mask. The second circuit pattern is located between and excluded from the pattern free regions adjacent the at least two first circuit patterns.
申请公布号 US8987142(B2) 申请公布日期 2015.03.24
申请号 US201313737192 申请日期 2013.01.09
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Lee Chia-Ying;Shieh Jyu-Horng
分类号 H01L21/311;H01L21/44;H01L21/302;H01L21/461;H01L21/00;G03F7/00;H01L21/033 主分类号 H01L21/311
代理机构 Duane Morris LLP 代理人 Duane Morris LLP ;Koffs Steven E.
主权项 1. A multi-patterning method comprising: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate, wherein each spacer is coextensive with a pattern-free region adjacent and extending to a location where a respective first circuit pattern is to be formed, and patterning a second circuit pattern in the hard mask layer using a second mask, wherein the second circuit pattern is located between and excluded from the pattern-free regions adjacent the respective first circuit pattern in each of said two of the at least two first openings, wherein a distance between said two of the at least two first openings in the hard mask layer is a line width of the second circuit pattern.
地址 Hsin-Chu TW