Low EMI wide frequency range oscillator with automatic digital amplitude control

摘要

An oscillator/amplifier has a gain controlled amplifier that maintains a desired oscillation waveform amplitude for all possible oscillation frequencies of operation. A peak detector produces a direct current (DC) voltage proportional to the oscillation waveform, and a voltage reference generator provides a reference voltage that is compared against the DC voltage from the peak detector. When the DC voltage is less than the reference voltage the gain of the amplifier is increased, and when the DC voltage is equal to or greater than the reference voltage the gain of the amplifier is decreased. A programmable voltage reference generator may also be used to provide for selection of different oscillation waveform amplitudes. A digital control loop controls the oscillation waveform amplitude over the entire possible frequency range of operation. Various frequency determining elements, e.g., crystal, piezoelectric resonator, inductor-capacitor tuned circuit, resistor-capacitor network, etc., may be used in combination with the oscillator/amplifier.

主权项

1. A wide frequency range oscillator having automatic digital amplitude control, comprising:
an oscillator/amplifier adapted for coupling to a frequency determining element, wherein the frequency determining element is selected from the group consisting of a crystal, a piezoelectric resonator, an inductor-capacitor tuned circuit, and a resistor-capacitor network which determines an oscillation frequency of the oscillator amplifier; a peak amplitude detector coupled to the oscillator-amplifier, wherein the peak amplitude detector provides a direct current (DC) voltage proportional to an amplitude of an oscillation signal from the oscillator/amplifier; a voltage reference generator for providing a reference voltage; a voltage comparator for comparing the DC voltage from the peak amplitude detector to the reference voltage, wherein the voltage comparator is at a first logic level when the DC voltage from the peak amplitude detector is less than the reference voltage and is at a second logic level when the DC voltage from the peak amplitude detector is greater than the reference voltage; an up/down counter having a clock input and a up/down count control input coupled to the voltage comparator, wherein when the up/down count control input is at the first logic level the up/down counter increments up a count value, and when the count control input is at the second logic level the up/down counter decrements down the count value; a digital-to-analog converter (DAC) having inputs coupled to the up/down counter and an output coupled to the oscillator/amplifier; and a start-up register and a power-on-reset (POR) detector coupled to the up/down counter, wherein when a start-up occurs the up/down counter is loaded with a start-up count value from the start-up register, wherein amplification gain of the oscillator/amplifier is determined by an analog current value from the output of the DAC which is controlled by the count value from the up/down counter.