发明名称 Field Effect Transistor with Conduction Band Electron Channel and Uni-Terminal Response
摘要 A uni-terminal transistor device is described. In one embodiment, an n-channel transistor comprises a first semiconductor layer having a discrete hole level H0; a second semiconductor layer having a conduction band minimum EC2; a wide bandgap semiconductor barrier layer disposed between the first and the second semiconductor layers; a gate dielectric layer disposed above the first semiconductor layer; and a gate metal layer disposed above the gate dielectric layer and having an effective workfunction selected to position the discrete hole level H0 below the conduction band minimum EC2 for zero bias applied to the gate metal layer and to obtain n-terminal characteristics.
申请公布号 US2015076513(A1) 申请公布日期 2015.03.19
申请号 US201414559521 申请日期 2014.12.03
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Passlack Matthias
分类号 H01L27/092;H01L29/205;H01L29/20 主分类号 H01L27/092
代理机构 代理人
主权项 1. An inverter circuit comprising: an n-channel transistor with n-terminal characteristics comprising: a first semiconductor layer having a first discrete hole level H0;a second semiconductor layer having a conduction band minimum EC2;a first wide bandgap semiconductor barrier layer disposed between the first and the second semiconductor layers;a first gate dielectric layer disposed above the first semiconductor layer;a first gate metal layer disposed above the first gate dielectric layer and having a first effective workfunction selected to position the first discrete hole level H0 below the conduction band minimum Ec2 for zero bias applied to the first gate metal layer and to obtain n-terminal characteristics; anda first set of extensions having n-type conductivity; and an n-channel transistor with p-terminal characteristics comprising: a third semiconductor layer having a second discrete hole level H0;a fourth semiconductor layer having a conduction band minimum EC2;a second wide bandgap semiconductor barrier layer disposed between the third and fourth semiconductor layers;a second gate dielectric layer disposed above the third semiconductor layer; anda second gate metal layer disposed above the second gate dielectric layer and having a second effective workfunction selected to position the second discrete hole level H0 below the second conduction band minimum Ec2 for zero bias applied to the second gate metal layer and to obtain p-terminal characteristics; anda second set of extensions having n-type conductivity.
地址 Hsin-Chu TW