发明名称 Method of fabricating slanted field-plate GaN heterojunction field-effect transistor
摘要 A method of forming a slanted field plate including forming epitaxy for a FET on a substrate, forming a wall near a drain of the FET, the wall comprising a first negative tone electron-beam resist (NTEBR), depositing a dielectric over the epitaxy and the wall, the wall causing the dielectric to have a step near the drain of the FET, depositing a second NTEBR over the dielectric, wherein surface tension causes the deposited second NTEBR to have a slanted top surface between the step and a source of the FET, etching anisotropically vertically the second NTEBR and the dielectric to remove the second NTEBR and to transfer a shape of the slanted top surface to the dielectric, and forming a gatehead comprising metal on the dielectric between the step and the source of the FET, wherein the gatehead forms a slanted field plate.
申请公布号 US8980759(B1) 申请公布日期 2015.03.17
申请号 US201414284905 申请日期 2014.05.22
申请人 HRL Laboratories, LLC 发明人 Corrion Andrea;Wong Joel C.;Shinohara Keisuke;Micovic Miroslav;Milosavljevic Ivan;Regan Dean C.;Tang Yan
分类号 H01L21/302;H01L29/40;H01L29/66;H01L21/3065;H01L29/20 主分类号 H01L21/302
代理机构 Ladas & Parry 代理人 Ladas & Parry
主权项 1. A method of forming a slanted field plate comprising: forming epitaxy for a field effect transistor (FET) on a substrate; forming a wall on the epitaxy near a drain of the FET, the wall comprising a first negative tone electron-beam resist; depositing a dielectric over the epitaxy and the wall, the wall causing the dielectric to have a step near the drain of the FET; depositing a second negative tone electron-beam resist over the dielectric, wherein surface tension causes the deposited second negative tone electron-beam resist to have a slanted top surface between the step and a source of the FET; etching anisotropically vertically the second negative tone electron-beam resist and the dielectric to remove the second negative tone electron-beam resist and to transfer a shape of the slanted top surface to the dielectric between the step and the source of the FET; and forming a gatehead comprising metal on the dielectric between the step and the source of the FET; wherein the gatehead forms a slanted field plate.
地址 Mallbu CA US