发明名称 Ultra-high voltage N-type-metal-oxide-semiconductor (UHV NMOS) device and methods of manufacturing the same
摘要 An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device with improved performance and methods of manufacturing the same are provided. The UHV NMOS includes a substrate of P-type material; a first high-voltage N-well (HVNW) region disposed in a portion of the substrate; a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk; a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate; a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; and an n-type implant layer formed on the P-Top layer.
申请公布号 US8980717(B2) 申请公布日期 2015.03.17
申请号 US201314071768 申请日期 2013.11.05
申请人 Macronix International Co., Ltd. 发明人 Chen Chieh-Chih;Lin Cheng-Chi;Lin Chen-Yuan;Lien Shih-Chin;Wu Shyi-Yuan
分类号 H01L21/336;H01L29/66;H01L29/06;H01L29/08;H01L29/78;H01L29/10;H01L29/417;H01L29/423 主分类号 H01L21/336
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A method for manufacturing ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device, at least comprising: providing a substrate of P-type material; forming a first high-voltage N-well (HVNW) region in a portion of the substrate; forming a second HVNW region in another portion of the substrate, wherein the second HVNW region is disposed at a high-side operation region of the substrate; forming at least two p-wells (PWs) separately in a region for PWs, the region for PWs adjacent to the first and second HVNW regions; forming a source and bulk p-well (PW) adjacent to one side of the first HVNW region; forming a P-Top layer within the first HVNW region; and forming an n-type implant layer on the P-Top layer.
地址 Hsinchu TW