发明名称 |
High reliability memory controller |
摘要 |
An integrated circuit includes a memory having an address space and a memory controller coupled to the memory for accessing the address space in response to received memory accesses. The memory controller further accesses a plurality of data elements in a first portion of the address space, and reliability data corresponding to the plurality of data elements in a second portion of the address space. |
申请公布号 |
US8984368(B2) |
申请公布日期 |
2015.03.17 |
申请号 |
US201213649745 |
申请日期 |
2012.10.11 |
申请人 |
Advanced Micro Devices, Inc. |
发明人 |
Loh Gabriel H.;Sridharan Vilas K. |
分类号 |
G11C29/00;G06F11/10 |
主分类号 |
G11C29/00 |
代理机构 |
Polansky & Associates, P.L.L.C. |
代理人 |
Polansky & Associates, P.L.L.C. ;Polansky Paul J. |
主权项 |
1. An integrated circuit, comprising:
a memory having an address space; and a memory controller coupled to said memory for accessing said address space in response to received memory accesses, said memory controller further accessing a plurality of data elements in a first portion of said address space, and reliability data corresponding to said plurality of data elements in a second portion of said address space, wherein:
said address space comprises a plurality of banks having an order within said address space;said first portion of said address space comprises a plurality of groups of a predetermined number of data elements distributed among said plurality of banks in said order; andsaid second portion of said address space comprises a reliability data element for each corresponding data element of each of said plurality of groups, wherein reliability data elements for a group are located in a first bank following a second bank that includes a last data element of said group in said order. |
地址 |
Sunnyvale CA US |