| 主权项 |
1. A method comprising:
monitoring a first memory location by a first processor; writing, by a second processor, an inter-processor interrupt request to the first memory location, wherein the first and second processors are general purpose processors of same type within a multi-processor computer system; detecting, by the first processor, the inter-processor interrupt request in the first memory location, the first processor saving its state and executing a call instruction in response to the detecting, the call instruction specifying an address of an interrupt service routine to invoke said interrupt service routine, said address of said interrupt service routine having been made available to said first processor through a boot-up registration process; performing, by the first processor, the interrupt service routine for the inter-processor interrupt request; monitoring, by the second processor, a second, different memory location for acknowledgement of receipt of the inter-processor interrupt request; and writing, by the first processor, to the second, different memory location to acknowledge receipt of the inter-processor interrupt request, wherein the first memory location is accessible by a plurality of first processors, the plurality of first processors to monitor the first memory location to detect the inter-processor interrupt request, the first memory location being a single memory address. |
