发明名称 DEAD-TIME COMPENSATION APPARATUS OF POWER CONVERSION APPARATUS
摘要 PROBLEM TO BE SOLVED: To compensate an output voltage error caused by dead time or ON voltage drop in PWM modulation.SOLUTION: An output voltage of a PWM inverter or an input voltage of a PWM converter is detected by a voltage detection circuit. The voltage detection circuit using an A/D converter for performing ▵&Sgr; modulation integrates bit data converted by the A/D converter, converts the integrated value into a digital value at timing synchronized with a PWM gate signal generating carrier and calculates a reference wave component of the detection voltage. The voltage detection circuit calculates a difference between the reference wave component and a voltage command of the PWM inverter (or the PWM converter) and outputs an addition value of the difference and the voltage command to a PWM modulation part.
申请公布号 JP2015047021(A) 申请公布日期 2015.03.12
申请号 JP20130177445 申请日期 2013.08.29
申请人 MEIDENSHA CORP 发明人 TAKIGUCHI MASASHI;YAMAMOTO YASUHIRO
分类号 H02M7/537;H02M7/48 主分类号 H02M7/537
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