| 发明名称 | Bandwidth reuse in multiplexed data stream | ||
| 摘要 | A network component comprising a processor configured to implement a method comprising promoting the communication of a frame within a synchronization window, wherein the frame comprises a plurality of data types carried in a plurality of timeslots, and wherein each timeslot is assigned to carry one of the data types, identifying an idle timeslot that is assigned to carry a first data type, and inserting a second data type into the idle timeslot. Also disclosed is a method comprising receiving a data stream comprising a plurality of timeslots, wherein each timeslot is assigned to carry one of a plurality of data types, and determining whether one of the timeslots assigned to carry a first data type contains a second data type. | ||
| 申请公布号 | US8976796(B2) | 申请公布日期 | 2015.03.10 |
| 申请号 | US200711735604 | 申请日期 | 2007.04.16 |
| 申请人 | Futurewei Technologies, Inc. | 发明人 | Fourcand Serge Francois |
| 分类号 | H04L12/28;H04J3/06 | 主分类号 | H04L12/28 |
| 代理机构 | Conley Rose, P.C. | 代理人 | Conley Rose, P.C. ;Rodolph Grant;Dietrich William H. |
| 主权项 | 1. A network component comprising: a processor coupled to a memory and configured to implement a method comprising: promoting the communication of a frame within a synchronization window, wherein the frame comprises a plurality of data types carried in a plurality of timeslots, and wherein each timeslot is assigned to carry one of the data types; identifying an idle timeslot that is assigned to carry a first data type; and inserting a second data type into the idle timeslot, wherein the second data type is part of a second data type stream, and wherein the method further comprises: identifying an active timeslot following the idle timeslot, the active timeslot assigned to carry the first data type; and interrupting the second data type stream by inserting the first data type into the active timeslot. | ||
| 地址 | Plano TX US | ||