发明名称 Method For Integrated Circuit Patterning
摘要 A method of forming a target pattern includes forming a first trench in a substrate with a cut mask; forming a first plurality of lines over the substrate with a first main mask, wherein the first main mask includes at least one line that overlaps the first trench and is thereby cut into at least two lines by the first trench; forming a spacer layer over the substrate and the first plurality of lines and over sidewalls of the first plurality of lines; forming a patterned material layer over the spacer layer with a second main mask thereby the patterned material layer and the spacer layer collectively define a second plurality of trenches; removing at least a portion of the spacer layer to expose the first plurality of lines; and removing the first plurality of lines thereby resulting a patterned spacer layer over the substrate.
申请公布号 US2015064916(A1) 申请公布日期 2015.03.05
申请号 US201314014771 申请日期 2013.08.30
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Shieh Ming-Feng;Liu Ru-Gun;Hsieh Hung-Chang;Bao Tien-I;Lee Chung-Ju;Shue Shau-Lin
分类号 H01L21/308 主分类号 H01L21/308
代理机构 代理人
主权项 1. A method of forming a target pattern for an integrated circuit, the method comprising: forming a first trench in a substrate with a cut mask; forming a first plurality of lines over the substrate with a first main mask, wherein the first main mask includes at least one line that overlaps the first trench and is thereby cut into at least two lines by the first trench; forming a spacer layer over the substrate and the first plurality of lines and over sidewalls of the first plurality of lines; forming a patterned material layer over the spacer layer with a second main mask thereby the patterned material layer and the spacer layer collectively define a second plurality of trenches; removing at least a portion of the spacer layer to expose the first plurality of lines; and removing the first plurality of lines thereby providing a patterned spacer layer over the substrate.
地址 Hsin-Chu TW
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