发明名称 FLASH MEMORY WITH P-TYPE FLOATING GATE
摘要 Methods for manufacturing non-volatile memory devices including peripheral transistors with reduced and less variable gate resistance are described. In some embodiments, a NAND-type flash memory may include floating-gate transistors and peripheral transistors (or non-floating-gate transistors). The peripheral transistors may include select gate transistors (e.g., drain-side select gates and/or source-side select gates) and/or logic transistors that reside outside of a memory array region. A floating-gate transistor may include a floating gate of a first conductivity type (e.g., n-type) and a control gate including a lower portion of a second conductivity type different from the first conductivity type (e.g., p-type). A peripheral transistor may include a gate including a first layer of the first conductivity type, a second layer of the second conductivity type, and a cutout region including one or more sidewall diffusion barriers that extends through the second layer and a portion of the first layer.
申请公布号 US2015060987(A1) 申请公布日期 2015.03.05
申请号 US201414531857 申请日期 2014.11.03
申请人 SANDISK TECHNOLOGIES INC. 发明人 Sato Kenji
分类号 H01L29/788;H01L29/423;H01L29/49 主分类号 H01L29/788
代理机构 代理人
主权项 1. A semiconductor device, comprising: a floating gate layer; a dielectric layer over the floating gate player; a first control gate layer over the dielectric layer; a cutout region, the cutout region extends through the first control gate layer and the dielectric layer, the cutout region includes one or more sidewall diffusion barriers within the cutout region; and a second control gate layer over the first control gate layer and within the cutout region such that the second control gate layer directly contacts the floating gate layer without any intervening layers between the second control gate layer and the floating gate layer.
地址 Plano TX US