发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE |
摘要 |
According to embodiment, a nonvolatile semiconductor memory device, includes: a memory cell region; and a peripheral region, the memory cell region including: a semiconductor layer including semiconductor regions; control gate electrodes; a first insulating film; a semiconductor-containing layer having a smaller thickness than the first insulating film; and a second insulating film, the peripheral region including: the semiconductor layer; a third insulating film; the semiconductor-containing layer, and a periphery of the semiconductor-containing layer being surrounded by an element isolation region; the first insulating film provided on the semiconductor-containing layer; and a pair of conductive layers extending from a surface of the first insulating film to reach the third insulating film via the semiconductor-containing layer, and the pair of conductive layers being in contact with part of a lower surface of the semiconductor-containing layer. |
申请公布号 |
US2015060984(A1) |
申请公布日期 |
2015.03.05 |
申请号 |
US201414164647 |
申请日期 |
2014.01.27 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
SHIMIZU Shun;Yamashita Hiroki |
分类号 |
H01L29/788 |
主分类号 |
H01L29/788 |
代理机构 |
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代理人 |
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主权项 |
1. A nonvolatile semiconductor memory device comprising:
a memory cell region; and a peripheral region disposed at a periphery of the memory cell region, the memory cell region including:
a semiconductor layer including a plurality of semiconductor regions extending in a first direction, and the semiconductor layer being arranged in a direction crossing the first direction;a plurality of control gate electrodes provided on an upper side of the plurality of semiconductor regions, the control gate electrodes extending in a second direction crossing the first direction, and the control gate electrodes being arranged in a direction crossing the second direction;a first insulating film provided on a lower side of each of the plurality of control gate electrodes, and the first insulating film being in contact with the plurality of control gate electrodes;a semiconductor-containing layer provided at a crossing position of each of the plurality of semiconductor regions and the first insulating film, and the semiconductor-containing layer having a smaller thickness than the first insulating film; anda second insulating film provided between the semiconductor-containing layer and each of the plurality of semiconductor regions, the peripheral region including:
the semiconductor layer;a third insulating film provided on the semiconductor layer;the semiconductor-containing layer provided on the third insulating film, and a periphery of the semiconductor-containing layer being surrounded by an element isolation region;the first insulating film provided on the semiconductor-containing layer; anda pair of conductive layers extending from a surface of the first insulating film to reach the third insulating film via the semiconductor-containing layer, and the pair of conductive layers being in contact with part of a lower surface of the semiconductor-containing layer. |
地址 |
Minato-ku JP |