Insulated gate bipolar transistor structure having low substrate leakage

摘要

A high voltage laterally diffused metal-oxide-semiconductor (HV LDMOS) device, particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate having at least one highly doped buried portion, a first doped well grown over the substrate, a gate structure formed on the first well, a source and a drain formed on either side of the gate structure, and a second doped well having a U-shaped cross section formed in the first well. A portion of the drain is formed over the first well outside of the second well.

主权项

1. A high voltage semiconductor transistor, comprising:
a lightly doped semiconductor substrate having a first type of conductivity; a buried layer in a first portion of the semiconductor substrate having a second type of conductivity; a first well region having the second type of conductivity and formed over the lightly doped semiconductor substrate, the first well region having a lower dopant concentration than the buried layer, the buried layer being partially in the first well region; a second well region in the first well region and having the first type of conductivity, the second well region having a U-shape in a cross section between a drain and source, wherein both ends of the U-shape extends to a top surface of the first well region, and the cross section is taken in a direction perpendicular to a top surface of the lightly doped semiconductor substrate; a first insulating structure over and partially embedded in the first well region within the U-shape of the second well region and not contacting the second well region; a second insulating structure over a first end of the U-shape of the second well region; a gate structure near the first insulating structure over the first well region and partially over a second end of the U-shape of the second well region; a drain region in the first well region across the first insulating structure from the gate structure, the drain region comprising a first drain portion between the first insulating structure and the second insulating structure and a second drain portion across the second insulating structure from the first drain portion; an anti-punch through region below the first drain portion; and, a source region in the second well region disposed on a side of the gate structure opposite from the drain region.