Memory system having a plurality of types of memory chips and a memory controller for controlling the memory chips

摘要

A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system.

主权项

1. A memory interface circuit configured to communicate with a processing unit and at least two different types of memory chips, comprising:
a first terminal configured to receive a control output signals from the processing unit to access at least one of the memory chips; a conversion unit configured to covert the control output signals to memory input signals according to operation specifications of the memory chips; a second terminal configured to connect to the memory chips via a common line, the common line being shared by the memory chips, and configured to output a write enable signal as one of the memory input signals through the common line; and a third terminal configured to connect to one of the memory chips via a signal line, the signal line being different from the common line, and configured to output a chip enable signal as one of the memory input signals through the signal line, wherein the conversion unit is configured to output one of the memory input signals to one of the memory chips according to one of the operation specifications of the one of many of the memory chips during a period from a time when the conversion unit outputs another one of the memory input signals to another one of the memory chips to a time when the conversion unit receives a memory output signal corresponding to the another one of the memory inputs signals from the another one of the memory chips.