发明名称 the method of ECC decoder operation and the memory controller including it
摘要 Provided is a method for operating an error correction code (ECC) decoder using a low density parity check (LDPC) code. The ECC decoder receives a first chuck data and a second chuck data which is continuous to the first chuck data from a nonvolatile memory device and performs the error bit correction of the first chunk data. And, the error bit correction of the second chuck data is not performed when the first chuck data includes an error bit which cannot be corrected.
申请公布号 KR20150017948(A) 申请公布日期 2015.02.23
申请号 KR20130094222 申请日期 2013.08.08
申请人 发明人
分类号 G11C29/42 主分类号 G11C29/42
代理机构 代理人
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