发明名称 LIQUID CRYSTAL DISPLAY DEVICE AND DRIVING METHOD THEREOF
摘要 Provided are: a liquid crystal display device capable of rapidly discharging an image signal which is held in a pixel formation portion, when a power supply thereof is turned off; and a driving method of the liquid crystal display device. If the liquid crystal display device shifts to an off-sequence mode, then a data signal Vd with a potential Vdoff1 corresponding to a shift amount ΔV3 lowered by a coupling effect of a parasitic capacitance formed between a gate terminal and drain terminal of a thin film transistor (12) is applied to a signal line SL. When a scanning signal Vg turns to a high level, the data signal Vd applied to the signal line SL is written into the pixel formation portion (11), and a potential of a pixel signal Vpix becomes the Vdoff1. When the scanning signal Vg falls to a ground potential GND after an elapse of a period t1, the potential of the pixel signal Vpix is lowered by a shift amount ΔV3, and accordingly, the potential of the pixel signal Vpix becomes the ground potential GND. In this way, a direct current voltage applied to the liquid crystal layer also becomes 0V.
申请公布号 US2015049071(A1) 申请公布日期 2015.02.19
申请号 US201314386341 申请日期 2013.04.05
申请人 Sharp Kabushiki Kaisha 发明人 Kaneko Seiji
分类号 G09G3/36 主分类号 G09G3/36
代理机构 代理人
主权项 1. An active matrix-type liquid crystal display device that shifts to an off-sequence mode in such a manner that a power supply of the liquid crystal display device itself is turned off when the liquid crystal display device displays an image in an on-sequence mode, the liquid crystal display device comprising: a display unit including a plurality of scanning lines, a plurality of signal lines which intersect the plurality of scanning lines, and pixel formation portions arranged in a matrix so as to individually correspond to intersections of the plurality of scanning lines and the plurality of signal lines, and having thin film transistors which turn to an on state or an off state in response to a level of scanning signals applied to the scanning lines corresponding to the pixel formation portions, and pixel capacitances which hold image signals representing an image to be displayed; a scanning line drive circuit that applies the scanning signals to the scanning lines, the scanning signals serving for selectively activating the plurality of scanning lines; a signal line drive circuit that applies the image signals to the signal lines; a display control circuit that individually outputs control signals necessary to generate the scanning signals and the image signals to the scanning line drive circuit and the signal line drive circuit; a common electrode drive circuit that is provided commonly to the plurality of pixel formation portions, and applies a common voltage to a common electrode serving as one-side electrodes of the pixel capacitances; and an off-sequence control circuit that outputs a signal to the display control circuit when the power supply of the liquid crystal display device is turned off, the signal being necessary for the liquid crystal display device to shift to the off-sequence mode, wherein the off-sequence control circuit: by the scanning line drive circuit, applies a scanning signal with a second level as a ground potential to each of the scanning lines after applying the scanning signal to each of the scanning lines a scanning signal with a first level for a predetermined period, the first level being necessary to turn the thin film transistor to the on state; by the signal line dive circuit, applies to each of the signal lines a data signal with a potential corresponding to a shift amount of each of the image signals for the predetermined period, the shift amount being determined by a level difference between the first level and the second level, a parasitic capacitance formed between a gate terminal and drain terminal of the thin film transistor and a synthetic capacitance of the pixel formation portion including the parasitic capacitance by turning the level of each of the scanning signals from the first level to the second level; and controls the display control circuit to apply the ground potential to the common electrode by the common electrode drive circuit.
地址 Osaka-shi, Osaka JP