发明名称 System and method for providing optically triggered circuit breaker
摘要 A system/method for providing an optically triggered circuit breaker is provided. The system comprises a junction field-effect transistor (JFET) and gate drive coupled to the JFET's gate. The gate drive applies voltage bias (VG) to the gate and the gate drive is configured to bias VG so that the system allows current flow through the JFET in the Drain to Source or Source to Drain directions, or so that the system blocks voltages applied to the Drain and/or Source. The system also comprises a photodetector which detects light emitted by the JFET resulting from a fault condition. The photodetector transmits a signal to the gate drive to provide the selectively biased VG so that the system blocks voltages applied to the Drain and/or Source, in response to the light detection. A system/method for providing an optically triggered bidirectional circuit breaker comprising common source JFETs and two photodetectors is alternatively provided.
申请公布号 US8958193(B2) 申请公布日期 2015.02.17
申请号 US201313955912 申请日期 2013.07.31
申请人 Northrop Grumman Systems Corporation 发明人 Veliadis John V.
分类号 H02H9/02;H03K17/687;H02H1/00 主分类号 H02H9/02
代理机构 Andrews Kurth LLP 代理人 Andrews Kurth LLP ;Esserman Matthew J.;Wooden Sean S.
主权项 1. A system for providing an optically triggered bidirectional circuit breaker, the system comprising: a first junction field-effect transistor (JFET), wherein the first JFET includes a gate, drain (D1), and source, and has gate-to-drain and gate-to-source built-in potentials; a second JFET, wherein the second JFET includes a gate, drain (D2), and source, and has gate-to-drain and gate-to-source built-in potentials, and wherein the first JFET and the second JFET are connected in common source series such that the first JFET source and the second JFET source are shorted together at a common point S; a gate drive coupled to the first JFET gate and the second JFET gate, referenced to the common point S, wherein the gate drive is connected to the drain D1 of the first JFET only through internal circuitry of the first JFET, and is connected to the drain D2 of the second JFET only through internal circuitry of the second JFET, and the gate drive is configured to apply a selective voltage bias VG to the first JFET gate and the second JFET gate, so that the system allows current to flow through the first JFET and the second JFET in the D1 to D2 direction or to flow through the second JFET and the first JFET in the D2 to D1 direction, or so that the system blocks voltages applied to D1 of the first JFET and/or D2 of the second JFET; and a first photodetector coupled to the gate drive, wherein the first photodetector is capable of detecting light emitted by the first JFET resulting from a fault condition, wherein the first photodetector transmits a signal to the gate drive to provide the selectively biased voltage VG so that the system blocks voltages applied to D1 of the first JFET and/or D2 of the second JFET, in response to the detection of light emitted by the first JFET.
地址 Falls Church VA US