Multi-chip initialization using a parallel firmware boot process

摘要

Mechanisms, in a multi-chip data processing system, for performing a boot process for booting each of a plurality of processor chips of the multi-chip data processing system are provided. With these mechanisms, a multi-chip agnostic isolated boot phase operation is performed, in parallel, to perform an initial boot of each of the plurality of processor chips as if each of the processor chips were an only processor chip in the multi-chip data processing system. A multi-chip aware isolated boot phase operation of each of the processor chips is performed in parallel, where each of the processor chips has its own separately configured address space. In addition, a unified configuration phase operation is performed to select a master processor chip from the plurality of processor chips and configure other processor chips in the plurality of processor chips to operate as slave processor chips that are controlled by the master processor chip.

主权项

1. A method, in a multi-chip data processing system, for performing a boot process for booting each of a plurality of processor chips of the multi-chip data processing system, comprising:
performing, in parallel, a multi-chip agnostic isolated boot phase operation to perform an initial boot of each of the plurality of processor chips as if each of the processor chips were an only processor chip in the multi-chip data processing system; performing, in parallel, a multi-chip aware isolated boot phase operation of each of the processor chips where each of the processor chips has its own separately configured physical address space; and performing a unified configuration phase operation to select a master processor chip from the plurality of processor chips and configure other processor chips in the plurality of processor chips to operate as slave processor chips that are controlled by the master processor chip, wherein, during the multi-chip agnostic isolated boot phase operation, the initial boot of each of the plurality of processor chips is performed by executing boot code from a shared flash memory that is shared by all of the processor chips in the plurality of processor chips.