发明名称 |
Semiconductor devices |
摘要 |
A semiconductor device includes a cell region including memory cells that have a selection element and a data storage element, and a driving circuit region including a driving transistor configured to operate the selection element. The driving transistor includes active portions defined by a device isolation pattern in a substrate and a gate electrode running across the active portion along a first direction, the gate electrode including channel portions of a ring-shaped structure. The driving transistor further includes first impurity doped regions disposed in the active portions that are surrounded by channel portions, and second impurity doped regions disposed in the active portion that are separated from the first impurity doped regions by the channel portions. |
申请公布号 |
US8953356(B2) |
申请公布日期 |
2015.02.10 |
申请号 |
US201213525675 |
申请日期 |
2012.06.18 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Han Seunguk;Choi Jay-Bok;Lee Dong-Hyun;Jeon Namho |
分类号 |
G11C5/02;G11C5/06;H01L27/02;H01L27/105;H01L29/40;H01L29/10;H01L29/423;H01L27/088;H01L27/108;H01L27/115;H01L27/11 |
主分类号 |
G11C5/02 |
代理机构 |
F. Chau & Associates, LLC |
代理人 |
F. Chau & Associates, LLC |
主权项 |
1. A semiconductor device comprising:
a cell region including memory cells, each of memory cells including a selection element and a data storage element; and a driving circuit region including a driving transistor configured to operate the selection element, wherein the driving transistor comprises:
active portions defined by a device isolation pattern in a substrate;a gate electrode running across the active portions along a first direction, the gate electrode including channel portions of a ring-shaped structure;first impurity doped regions disposed in the active portions, each of the first impurity doped regions being surrounded by each of channel portions;second impurity doped regions disposed in the active portions, the second impurity doped regions being separated from the first impurity doped regions by the channel portions; and bit line contact plugs disposed on the first impurity doped regions, wherein the gate electrode further includes connecting portions being arranged in a row along the first direction, each of the connecting portions connecting two neighboring channel portions. |
地址 |
Suwon-si, Gyeonggi-do KR |