发明名称 Solid-state imaging device having a vertical transistor with a dual polysilicon gate
摘要 A solid-state imaging device includes: a pixel part having a photoelectric conversion part photoelectrically converting incident light to obtain signal charge; and a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate. The pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor. The vertical transistor has a groove part formed on the semiconductor substrate; a gate insulator film formed on an inner surface of the groove part; a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part; a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; and an electrode layer connected to the conducting layer on the filling layer.
申请公布号 US8952315(B2) 申请公布日期 2015.02.10
申请号 US200912574494 申请日期 2009.10.06
申请人 Sony Corporation 发明人 Ohta Kazunobu;Hirano Tomoyuki
分类号 H01L27/00;H01L31/00;H01L31/113;H01L27/146;H01L29/66 主分类号 H01L27/00
代理机构 The Chicago Technology Law Group, LLC 代理人 Depke Robert J.;The Chicago Technology Law Group, LLC
主权项 1. A solid-state imaging device comprising: a pixel part having a photoelectric conversion part that photoelectrically converts incident light to obtain signal charge; and a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate, the pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor, the vertical transistor having a groove part formed in the semiconductor substrate;a gate insulator film formed on an inner surface of the groove part;a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part;a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; andan electrode layer in electrical communication with the conducting layer located above the filling layer, and wherein the conducting layer includes polysilicon containing an N-type impurity or a P-type impurity, and the filling layer includes a metal or a metal compound or polysilicon formed separately from the conducting layer and further wherein a gate electrode of the vertical transistor and the planar transistor are each comprised of a same first and second polysilicon material.
地址 Tokyo JP