发明名称 |
Circuit substrate for mounting chip, method for manufacturing same and chip package having same |
摘要 |
A circuit board includes an insulation layer, an electrically conductive layer, and a solder mask layer. The insulation layer has a plurality of through holes passing through. The electrically conductive layer is formed on a surface of the insulation layer and covers the through holes. The electrically conductive layer has a plurality of portions exposed in the through holes to serve as a plurality of first conductive pads. The solder mask layer covers the electrically conductive layer and defines a plurality of openings to expose parts of the electrically conductive layer. Parts of the electrically conductive layer are exposed to the solder mask layer to serve as a plurality of second conductive pads. The second conductive pads are electrically connected to the first conductive pads respectively. This disclosure further relates to a chip package and a method of manufacturing the same. |
申请公布号 |
US8951848(B2) |
申请公布日期 |
2015.02.10 |
申请号 |
US201313771320 |
申请日期 |
2013.02.20 |
申请人 |
Zhen Ding Technology Co., Ltd. |
发明人 |
Chou E-Tung;Hsiao Chih-Jen |
分类号 |
H01L21/00;H05K1/11;H01L23/00;H01L23/495;H05K1/09;H01L21/48;H01L23/498;H01L23/31 |
主分类号 |
H01L21/00 |
代理机构 |
Novak Druce Connolly Bove + Quigg LLP |
代理人 |
Novak Druce Connolly Bove + Quigg LLP |
主权项 |
1. A method for manufacturing a chip package, comprising:
providing a circuit board, wherein the circuit board comprises an insulation layer, the insulation layer has a first surface, an opposite second surface, and a plurality of through holes passing through the first and second surfaces, a patterned electrically conductive layer is formed on the first surface of the insulation layer, the patterned electrically conductive layer has a plurality of portions exposed in the through holes to serve as a plurality of first conductive pads, a solder mask layer covers the patterned electrically conductive layer, the solder mask defines a plurality of openings to expose parts of the patterned electrically conductive layer, the exposed parts of the patterned electrically conductive layer serves as a plurality of second conductive pads, the second conductive pads are electrically connected to the first conductive pads respectively, a seed layer is formed over the second surface, inner surfaces of the through holes, and the first conductive pads are exposed in the through holes, and a stiffener is attached on the seed layer on the second surface and covers the through holes at the second surface; mounting a chip to the circuit board, and electrically connecting the chip with the second conductive pads of the circuit board; and removing the stiffener and the seed layer, thereby obtaining a chip package. |
地址 |
Tayuan, Taoyuan TW |