发明名称 Amplifiers with enhanced power supply rejection ratio at the output stage
摘要 An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.
申请公布号 US8952757(B2) 申请公布日期 2015.02.10
申请号 US201313922884 申请日期 2013.06.20
申请人 MediaTek Inc. 发明人 Wen Sung-Han;Yang Chien-Chung
分类号 H03G3/10;H03G3/00;H03F1/30;H03F3/30 主分类号 H03G3/10
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. An amplifier circuit receiving a first supply voltage and a second supply voltage, comprising: a detection circuit, detecting disturbances occurring in the first supply voltage and providing detection results to a control amplifier circuit; the control amplifier circuit, coupled to the detection circuit and controlling a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detected results; and an output stage circuit, comprising: a first output power transistor, coupled to the control amplifier circuit at the first control node; and a second output power transistor, coupled to the control amplifier circuit at the second control node, wherein the first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.
地址 Hsin-Chu TW