| 摘要 |
A semiconductor device includes an N−-type well 13, a P-type body diffusion layer 14, an N+-type source diffusion layer 18, an N+-type drain diffusion layer 19, and a P+-type body contact region 32. A plurality of the P+-type body contact regions 32 are located along gate electrodes 17a and 17b, a plurality of first contact holes 25 are located along the gate electrodes, and a plurality of second contact holes 27 are located along the gate electrodes. The pitch of the plurality of P+-type body contact regions 32 is larger than the pitch of the plurality of first contact holes 25. |
| 主权项 |
1. A semiconductor device comprising:
a first conductivity type first diffusion layer located in a semiconductor layer; a gate electrode located over the first diffusion layer and the semiconductor layer via a gate insulation film; a second conductivity type second diffusion layer that is one of a source region and a drain region, and is located in the first diffusion layer to one side of the gate electrode in a channel length direction; a second conductivity type third diffusion layer that is the other of the source region and the drain region, and is located in the semiconductor layer to the other side of the gate electrode in the channel length direction; a plurality of first conductivity type fourth diffusion layers that are located in the second diffusion layer and are electrically connected to the first diffusion layer; an insulation film that is located over the semiconductor layer, the first diffusion layer, and the gate electrode; a plurality of first contact holes that are located in the insulation film, and are located over the second diffusion layer and the fourth diffusion layer; and a plurality of second contact holes that are located in the insulation film, and are located over the third diffusion layer, wherein the plurality of fourth diffusion layers are located along the gate electrode, and each of the plurality of fourth diffusion layers is surrounded by the second diffusion layer, the plurality of first contact holes are located along the gate electrode, the plurality of second contact holes are located along the gate electrode, and a pitch of the plurality of fourth diffusion layers is larger than a pitch of the plurality of first contact holes. |
