COMMAND EXECUTING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS

摘要

A command executing method for a memory storage apparatus is provided. The method includes grouping logical addresses into logical address groups and assigning a key for each of the logical address groups independently. The method also includes receiving a write command and write data corresponding to the write command and temporarily storing the write data into a buffer memory. The method further includes executing the write command, enabling a direct memory access once to transfer the write data from the buffer memory to a writable non-volatile memory module of the memory apparatus and encrypting each sector data of the write data with keys corresponding to the logical address groups that the logical address storing the sector data belong to.

主权项

1. A command executing method for a memory storage apparatus, the command executing method comprising:
grouping a plurality of logical addresses corresponding to the memory storage apparatus into a plurality of logical address groups; assigning a plurality of keys to the logical address groups respectively, wherein each of the keys is assigned independently to one of the logical address groups; receiving a write command and write data corresponding to the write command from a host system and temporarily storing the write data into a buffer memory, wherein the write data includes a plurality of sector data, the write command indicates writing the plurality of sector data into a plurality of target logical addresses among the logical addresses and the target logical addresses belong to at least two different logical address groups among the logical address groups; and executing the write command, enabling a direct memory access once to transfer the write data from the buffer memory to a rewritable non-volatile memory module of the memory storage apparatus and encrypting the plurality of sector data in the transferred write data by an encryption/decryption circuit with the keys corresponding to the logical address groups of the target logical addresses.