| 发明名称 | System, method, and computer program product for verification using X-propagation | ||
| 摘要 | The present disclosure relates to a computer-implemented method for electronic design verification. The method may include providing, using a processor, a low-power electronic design and determining if a power domain associated with the low-power electronic design is active. The method may further include identifying, at a register transfer level (RTL) at least one X value associated with an active power domain wherein identifying occurs during a simulation. | ||
| 申请公布号 | US8949754(B1) | 申请公布日期 | 2015.02.03 |
| 申请号 | US201314108902 | 申请日期 | 2013.12.17 |
| 申请人 | Cadence Design Systems, Inc. | 发明人 | Sharma Amit;Aggarwal Amit;Chopra Manu;Raheja Abhishek |
| 分类号 | G06F17/50 | 主分类号 | G06F17/50 |
| 代理机构 | Holland & Knight LLP | 代理人 | Holland & Knight LLP ;Whittenberger, Esq. Mark H. |
| 主权项 | 1. A computer-implemented method for electronic design verification comprising: providing, using a processor, a low-power electronic design; determining if a power domain associated with the low-power electronic design is active; and identifying, at a register transfer level (RTL), at least one X value associated with an active power domain wherein identifying occurs during a simulation. | ||
| 地址 | San Jose CA US | ||