发明名称 Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die
摘要 A semiconductor die has a first semiconductor die mounted to a carrier. A plurality of conductive pillars is formed over the carrier around the first die. An encapsulant is deposited over the first die and conductive pillars. A first stepped interconnect layer is formed over a first surface of the encapsulant and first die. The first stepped interconnect layer has a first opening. A second stepped interconnect layer is formed over the first stepped interconnect layer. The second stepped interconnect layer has a second opening. The carrier is removed. A build-up interconnect structure is formed over a second surface of the encapsulant and first die. A second semiconductor die over the first semiconductor die and partially within the first opening. A third semiconductor die is mounted over the second die and partially within the second opening. A fourth semiconductor die is mounted over the second stepped interconnect layer.
申请公布号 US8946870(B2) 申请公布日期 2015.02.03
申请号 US201213349510 申请日期 2012.01.12
申请人 STATS ChipPAC, Ltd. 发明人 Pagaila Reza A.;Do Byung Tai;Chua Linda Pei Ee
分类号 H01L23/48;H01L23/31;H01L21/56;H01L23/00;H01L25/03;H01L25/065 主分类号 H01L23/48
代理机构 Patent Law Group: Atkins and Associates, P.C. 代理人 Atkins Robert D.;Patent Law Group: Atkins and Associates, P.C.
主权项 1. A semiconductor device, comprising: a first semiconductor die; an encapsulant disposed over and around the first semiconductor die; a plurality of conductive pillars formed through the encapsulant and disposed around the first semiconductor die; a first stepped interconnect structure formed over a first surface of the encapsulant and electrically connected to the conductive pillars; a second semiconductor die disposed within an opening in the first stepped interconnect structure; a third semiconductor die disposed over the first stepped interconnect structure and second semiconductor die; an interconnect structure formed over the first semiconductor die and a second surface of the encapsulant and electrically connected to the conductive pillars; and wherein a surface of the first semiconductor die is devoid of encapsulant.
地址 Singapore SG