发明名称 |
Light emitting device, light emitting module, and method for manufacturing light emitting device |
摘要 |
According to one embodiment, a light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a first insulating layer, a p-side interconnect layer, an n-side interconnect layer, and a second insulating layer. The portion of the second p-side interconnect layer has the L-shaped cross section being configured to include a p-side external terminal exposed from the first insulating layer and the second insulating layer at a third surface having a plane orientation different from the first surface and the second surface. The portion of the second n-side interconnect layer has the L-shaped cross section being configured to include an n-side external terminal exposed from the first insulating layer and the second insulating layer at the third surface. |
申请公布号 |
US8946738(B2) |
申请公布日期 |
2015.02.03 |
申请号 |
US201313961527 |
申请日期 |
2013.08.07 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Kojima Akihiro;Sugizaki Yoshiaki;Akimoto Yosuke;Higuchi Kazuhito;Obata Susumu |
分类号 |
H01L33/00;H01L29/20;H01L33/62;H01L33/48;H01L33/20;H01L33/44;H01L33/54;H05K1/18 |
主分类号 |
H01L33/00 |
代理机构 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A light emitting device, comprising:
a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer provided between the first surface and the second surface; a p-side electrode provided on the semiconductor layer; an n-side electrode provided on the semiconductor layer; a first insulating layer provided on the second surface side, the first insulating layer having a first via communicating with the p-side electrode and a second via communicating with the n-side electrode; a p-side interconnect layer including a first p-side interconnect layer electrically connected to the p-side electrode through the first via, and a second p-side interconnect layer electrically connected to the first p-side interconnect layer and provided on an interconnect surface provided on a side of the first insulating layer opposite to the semiconductor layer, the second p-side interconnect layer including a portion having a U-shaped cross section; an n-side interconnect layer including a first n-side interconnect layer electrically connected to the n-side electrode through the second via, and a second n-side interconnect layer electrically connected to the first n-side interconnect layer, separated from the p-side interconnect layer and provided on the interconnect surface, the second n-side interconnect layer including a portion having a U-shaped cross section; and a second insulating layer provided between the p-side interconnect layer and the n-side interconnect layer, the portion of the second p-side interconnect layer having a p-side external terminal exposed from the first insulating layer and the second insulating layer at a third surface having a plane orientation different from the first surface and the second surface, the portion of the second n-side interconnect layer having an n-side external terminal exposed from the first insulating layer and the second insulating layer at the third surface. |
地址 |
Minato-ku JP |