发明名称 Systems and methods of signal synchronization for driving light emitting diodes
摘要 System and method for signal synchronization. The system includes a first selection component, a first signal generator, a second signal generator and a first gate drive component. The first selection component is configured to receive a first mode signal and generate a first selection signal based on at least information associated with the first mode signal. The first signal generator is configured to, if the first selection signal satisfies one or more first conditions, receive a first input signal and generate at least a first clock signal based on at least information associated with the first input signal. Furthermore, the first gate drive component is configured to, if the first selection signal satisfies the one or more first conditions, receive at least the first clock signal and output a first drive signal to a first switch.
申请公布号 US8947136(B2) 申请公布日期 2015.02.03
申请号 US201313945770 申请日期 2013.07.18
申请人 On-Bright Electronics (Shanghai) Co., Ltd. 发明人 Su Yongsheng;Zhu Liqiang;Luo Qiang;Fang Lieyi
分类号 H03L7/00;H05B33/08 主分类号 H03L7/00
代理机构 Jones Day 代理人 Jones Day
主权项 1. A system for signal synchronization, the system comprising: a first signal generator configured to, in response to a first selection signal associated with a first operation mode satisfying one or more first conditions, generate a first clock signal based on at least information associated with a first input signal, the first input signal including an input rising edge and being associated with an input frequency, the first clock signal including a first clock rising edge and being associated with a first clock frequency; a second signal generator configured to, in response to the first selection signal satisfying one or more second conditions, generate a second clock signal, the second clock signal including a second clock rising edge and being associated with a second clock frequency; and a first gate drive component configured to, in response to the first selection signal satisfying the one or more first conditions, output a first drive signal to a first switch based on at least information associated with the first clock signal; andin response to the first selection signal satisfying the one or more second conditions, output a second drive signal to the first switch based on at least information associated with the second clock signal; wherein: the input frequency and the first clock frequency are the same;the input rising edge and the first clock rising edge both correspond to a first time; andthe one or more second conditions are different from the one or more first conditions.
地址 Shanghai CN