发明名称 Stacked loadless random access memory device
摘要 <p>In a stacked load-less static random access memory (SRAM) device in which a pair of transmission transistors is stacked on a pair of driving transistors, the stacked load-less SRAM device includes first and second transistors arranged in first and second active regions separately on a semiconductor substrate and third and fourth transistors arranged on first and second semiconductor layers over the first and second transistors. A first drain region of the first transistor, a third drain region of the third transistor, and a second gate of the second transistor are electrically connected through a first contact node. A second drain region of the second transistor, a fourth drain region of the fourth transistor, and a first gate of the first transistor are electrically connected through a second contact node.</p>
申请公布号 KR101486426(B1) 申请公布日期 2015.01.26
申请号 KR20090007387 申请日期 2009.01.30
申请人 发明人
分类号 H01L27/11 主分类号 H01L27/11
代理机构 代理人
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