发明名称 RESISTIVE MEMORY WITH SMALL ELECTRODE AND METHOD FOR FABRICATING THE SAME
摘要 Systems and methods are disclosed involving a resistive memory with a small electrode, relating to the field of semiconductor resistive memory in ULSI. An illustrative resistive memory may include an Al electrode layer, a SiO2 layer, a Si layer, a resistive material layer and a lower electrode layer in sequence, wherein the Al electrode layer and the resistive material layer are electrically connected through one or more conductive channel and the conductive channel is formed by penetrating Al material into the Si layer via defects in the SiO2 layer and dissolving Si material into the Al material. Methods may include forming a lower electrode layer, a resistive layer, a Si layer and a SiO2 layer over a substrate; fabricating a Al electrode layer over the SiO2 layer; and performing an anneal process to the resultant structure. Consistent with innovations herein, a small electrode may be obtained via a conventional process.
申请公布号 US2015021539(A1) 申请公布日期 2015.01.22
申请号 US201213698799 申请日期 2012.05.02
申请人 Peking University 发明人 Cai Yimao;Mao Jun;Huang Ru;Tan Shenghu;Huang Yinglong;Pan Yue
分类号 H01L45/00 主分类号 H01L45/00
代理机构 代理人
主权项 1. A resistive memory with a small electrode, comprising, an Al electrode layer, a SiO2 layer, a Si layer, a resistive material layer and a lower electrode layer in sequence, wherein, the Al electrode layer and the resistive material layer are electrically connected through one or more conductive channel and the conductive channel is formed by penetrating Al material into the Si layer via defects in the SiO2 layer and dissolving Si material into the Al material.
地址 Beijing VN