| 摘要 |
<p>The present technology relates to a semiconductor device capable of preventing a control order of a write pipeline latch from being shuffled due to a data strobe signal inputted at an abnormal time, the semiconductor device including a latch unit having a plurality of write pipelines, and configured to latch data; and a control unit configured to store a fixed value in at least one among the write pipelines in response to idle signal information.</p> |
