发明名称 Method and apparatus for translating memory access address
摘要 A memory access address translating apparatus and method may each classify pixels included in an input image into a plurality of tiles, and may generate a new memory for each of the successive tiles to enable the successive tiles, among a plurality of tiles, to be stored in different banks.
申请公布号 US8937624(B2) 申请公布日期 2015.01.20
申请号 US201113297492 申请日期 2011.11.16
申请人 Samsung Electronics Co., Ltd.;Industry-Academia Cooperation Group of Sejong University 发明人 Park Gi Ho;Lee Won Chang;Lee Shi Hwa;Kim Do Hyung;Song Joon Ho;Jeong Sung Uk
分类号 G06F12/06;G06F12/00;G09G5/37;G09G5/399;G06F13/28;G09G5/39;G11C8/00;G06F12/02 主分类号 G06F12/06
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. An apparatus for translating a memory access address, the apparatus comprising: an address allocating unit to classify a plurality of pixels included in an input image based on a tile unit and to allocate a memory address to each of a plurality of tiles, wherein each of the plurality of tiles includes pixel information associated with the plurality of pixels included in the input image; an address generating unit to generate a new memory address for each successive tile among the plurality of tiles based on a corresponding memory address allocated to each of the plurality of tiles, the new memory address being configured to enable the successive tiles to be stored in different memory banks, wherein the address generating unit generates new memory addresses by performing a logical operation on a bit indicating a Y coordinate address of a tile and a bit indicating an X coordinate address of the tile in the corresponding memory address allocated to each of the plurality of tiles; and a memory controller to store each of the successive tiles in a corresponding new memory address.
地址 Suwon-Si KR