发明名称 SILICON WAFER AND WIRING FORMATION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a silicon wafer and a wiring formation method capable of accurately performing positioning of wiring on both surfaces of the silicon wafer by a simple configuration.SOLUTION: In a silicon wafer 21 forming wiring on a front face and a rear face, the silicon wafer 21 has a plurality of silicon chip regions 31 partitioned like a matrix, alignment holes 26 pierced from the front face of the silicon wafer 21 up to the rear face are formed correspondingly to the respective silicon chip regions 31 and the alignment holes 26 are used as alignment marks when exposing the rear face of the silicon wafer 21. When necessary, the alignment holes 26 are utilized as marks indicating scribe lines in dicing for cleaving between the respective silicon chip regions 31.
申请公布号 JP2015012054(A) 申请公布日期 2015.01.19
申请号 JP20130134655 申请日期 2013.06.27
申请人 FUKUOKA UNIV 发明人 TOMOKAGE HAJIME;KATO YOSHINAO;NOKITA KANTA;MITSUTOMI HISAMITSU;SUEYOSHI HARUKI
分类号 H01L21/027;G03F9/00 主分类号 H01L21/027
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