发明名称 HIGH-VOLTAGE FIELD-EFFECT TRANSISTOR HAVING MULTIPLE IMPLANTED LAYERS
摘要 A method for fabricating a high-voltage field-effect transistor includes forming a body region, a source region, and a drain region in a semiconductor substrate. The drain region is separated from the source region by the body region. Forming the drain region includes forming an oxide layer on a surface of the semiconductor substrate over the drain region and performing a plurality of ion implantation operations through the oxide layer while tilting the semiconductor substrate such that ion beams impinge on the oxide layer at an angle that is offset from perpendicular. The plurality of ion implantation operations form a corresponding plurality of separate implanted layers within the drain region. Each of the implanted layers is formed at a different depth within the drain region.
申请公布号 US2015014770(A1) 申请公布日期 2015.01.15
申请号 US201313941119 申请日期 2013.07.12
申请人 Power Integrations, Inc. 发明人 PARTHASARATHY Vijay;BANERJEE Sujit
分类号 H01L29/06;H01L29/78;H01L29/10;H01L29/66 主分类号 H01L29/06
代理机构 代理人
主权项 1. A method for fabricating a high-voltage field-effect transistor, the method comprising: forming a body region in a semiconductor substrate; forming a source region in the semiconductor substrate; and forming a drain region in the semiconductor substrate that may include a doped n-well region and is separated from the source region by the body region, wherein forming the drain region comprises: forming an oxide layer on a surface of the semiconductor substrate over the drain region; andperforming a plurality of ion implantation operations through the oxide layer while tilting the semiconductor substrate such that ion beams impinge on the oxide layer at an angle that is offset from perpendicular, wherein the plurality of ion implantation operations form a corresponding plurality of separate implanted layers within the drain region, and wherein each of the implanted layers is formed at a different depth within the drain region.
地址 San Jose CA US