主权项 |
1. A CMOS device, comprising;
a substrate, a source region, a drain region and a vertical channel on the substrate, wherein
the source region is disposed above the vertical channel and the drain region is disposed at both sides of the vertical channel on the substrate, or the drain region is disposed above the vertical channel and the source region is disposed at both sides of the vertical channel on the substrate,a gate electrode and a gate sidewall are disposed at both sides of the vertical channel,a first dielectric protection region is inserted into the vertical channel, the first dielectric protection region being located in the center of the vertical channel to divide the vertical channel into two parts, a height of the first dielectric protection region being equal to a length of the vertical channel, and an edge of the first dielectric protection region having a distance of 20-100 nm to an outer side of the channel, with a central axis of a silicon platform for an active region as the center; anda second dielectric protection region is disposed under the source region or the drain region on the substrate, a length of the second dielectric protection region being equal to a length of the source region or the drain region, and a height of the second dielectric protection region being 10-50 nm. |