发明名称 RADIATION RESISTANT CMOS DEVICE AND METHOD FOR FABRICATING THE SAME
摘要 A radiation resistant CMOS device and a method for fabricating the same. The CMOS device includes a substrate, a source region, a drain region and a vertical channel on the substrate. A first dielectric protection region is inserted into the vertical channel at the center of the vertical channel to divide the vertical channel into two parts and has a height equal to the length of the vertical channel. The edge of the first dielectric protection region is 20-100 nm from an outer side of the channel, with a central axis of an silicon platform for an active region as the center. A second dielectric protection region is disposed under the source or drain region, with a length equal to the length of the source or drain region and a height of 10-50 nm. The dielectric protection regions effectively block paths for the source and drain regions collecting charges.
申请公布号 US2015014765(A1) 申请公布日期 2015.01.15
申请号 US201314377838 申请日期 2013.06.05
申请人 PEKING UNIVERSITY 发明人 Huang Ru;Tan Fei;An Xia;Wu Weikang;Huang Liangxi
分类号 H01L27/092;H01L21/8238;H01L29/66;H01L29/778 主分类号 H01L27/092
代理机构 代理人
主权项 1. A CMOS device, comprising; a substrate, a source region, a drain region and a vertical channel on the substrate, wherein the source region is disposed above the vertical channel and the drain region is disposed at both sides of the vertical channel on the substrate, or the drain region is disposed above the vertical channel and the source region is disposed at both sides of the vertical channel on the substrate,a gate electrode and a gate sidewall are disposed at both sides of the vertical channel,a first dielectric protection region is inserted into the vertical channel, the first dielectric protection region being located in the center of the vertical channel to divide the vertical channel into two parts, a height of the first dielectric protection region being equal to a length of the vertical channel, and an edge of the first dielectric protection region having a distance of 20-100 nm to an outer side of the channel, with a central axis of a silicon platform for an active region as the center; anda second dielectric protection region is disposed under the source region or the drain region on the substrate, a length of the second dielectric protection region being equal to a length of the source region or the drain region, and a height of the second dielectric protection region being 10-50 nm.
地址 Beijing CN