发明名称 DIGITAL TRANSMISSION SIGNAL PROCESSING DEVICE HAVING POWER-DOWN MEANS
摘要 <p>PROBLEM TO BE SOLVED: To reduce undesired power consumption by providing a power-down means that reduces power of a synchronization pattern detection section for a prescribed period. SOLUTION: A 1st power-down control signal (h) is made inactive for a period after application of power before establishment of a synchronization pattern or after occurrence of out of synchronization till the establishment of the synchronization pattern so as to set a reference voltage (j) of a 1st control reference voltage generating section 6 to a usual value, the set reference voltage is fed to a current source of an ECL gate of a synchronization pattern detection section 1, which is operated normally. However, after the synchronization establishment resulting from detecting a first synchronization pattern, the 1st power-down control signal (h) is inactivated for the synchronization pattern period to set the reference voltage (j) to be a usual value and it is applied. The control signal (h) is activated for the other periods, the reference voltage (j) is set to a value lower than the usual value and it is applied to the current source of the ECL gate of the synchronization pattern detection section 1 so as to shut out the current consumed in the ECL gate thereby reducing the power of the synchronization pattern detection section 1.</p>
申请公布号 JPH1093520(A) 申请公布日期 1998.04.10
申请号 JP19960261154 申请日期 1996.09.11
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KAWAI KENJI;KOIKE KEIICHI;ICHINO HARUHIKO
分类号 H04J3/00;H04L12/28;(IPC1-7):H04J3/00 主分类号 H04J3/00
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