Integrated video equalizer and jitter cleaner

摘要

An integrated system for adaptive equalization and jitter reduction of a video signal that includes an adaptive equalizer and a jitter cleaner located on one integrated circuit within a single package. An adaptive equalizer applies frequency specific signal modification to the received signal. A bit rate detector determines a bit rate of the video signal or the equalized signal. The jitter cleaner couples to the adaptive equalizer output and processes the equalized signal to reduce jitter in the equalized signal. A multiplexer receives the equalized signal and the jitter cleaner output and, responsive to a control signal, outputs either the equalized signal or the jitter cleaner output signal. A status monitor may optionally be included to compare the detected bit rate to a bit rate threshold, and a responsive to the comparing activate or deactivate the jitter cleaner and output either the equalized signal or jitter cleaner output.

主权项

1. An integrated system for adaptive equalization and jitter reduction comprising:
an input configured to receive a video signal from a channel; an adaptive equalizer configured to apply frequency specific signal modification to the received signal to present an equalized signal on an adaptive equalizer output; a bit rate detector configure to determine a detected bit rate of the video signal or the equalized signal; a jitter cleaner having a jitter cleaner input coupled to the adaptive equalizer output, the jitter cleaner configured to process the equalized signal to reduce jitter in the equalized signal to create a jitter cleaner output; a multiplexer configured to receive the equalized signal and the jitter cleaner output and, responsive to a control signal, output either the equalized signal or the jitter cleaner output; and a status monitor configured to:
compare the detected bit rate to a bit rate threshold;responsive to the detected bit rate being greater than the bit rate threshold, activate the jitter cleaner to processes the equalized signal and generate a control signal which causes the multiplexer to output the jitter cleaner output; andresponsive to the detected bit rate being greater than the bit rate threshold, activate the jitter cleaner to processes the equalized signal and generate a control signal which causes the multiplexer to output the jitter cleaner output.