DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS

摘要

Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

主权项

1. A system comprising:
a graphics processor; a memory controller; a peripheral controller; and a multi-core processor coupled to the graphics processor, the memory controller, and the peripheral controller, the multi-core processor comprising a plurality of cores including a first processing core and a second processing core, the first processing core and the second processing core each including one of more arithmetic logic units and an instruction decoder, wherein the first processing core is capable of operating at a higher processing throughput than that of the second processing core; and scheduling logic to
monitor and control scheduling of tasks between the first processing core and the second processing core;transfer a task from the first processing core to the second processing core after a core state of the first processing core is saved and provided the second processing core, in response to an occurrence of an event; andplace the first processing core is to be in a lower power state after the second processing core resumes processing the task.