PARTIALLY RECESSED CHANNEL CORE TRANSISTORS IN REPLACEMENT GATE FLOW

摘要

An integrated circuit containing MOS transistors with replacement gates may be formed with elevated LDD regions and/or recessed replacement gates on a portion of the transistors. Elevating the LDD regions is accomplished by a selective epitaxial process prior to LDD implant. Recessing the replacement gates is accomplished by etching substrate material after removal of sacrificial gate material and before formation of a replacement gate dielectric layer. Elevating the LDD regions and recessing the replacement gates may increase a channel length of the MOS transistors and thereby desirably increase threshold uniformity of the transistors.

主权项

1. An integrated circuit, comprising:
a substrate comprising semiconductor material; a first metal oxide semiconductor (MOS) transistor, comprising a first replacement gate disposed on a first dielectric layer and a first channel, wherein the first channel extends adjacent the first dielectric layer along both a horizontal and a vertical surface; and a second MOS transistor comprising a second replacement gate disposed on a second dielectric layer and a second channel, wherein the second channel extends adjacent the second dielectric layer along a horizontal surface and not a vertical surface; in which: said first dielectric layer and said second dielectric layer have substantially equal composition; said first replacement gate and said second replacement gate have substantially equal composition; and said first MOS transistor and said second MOS transistor have a same polarity.