发明名称 |
METHOD OF FABRICATING SEMICONDUCTOR DEVICE |
摘要 |
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region. |
申请公布号 |
US2015011081(A1) |
申请公布日期 |
2015.01.08 |
申请号 |
US201414492382 |
申请日期 |
2014.09.22 |
申请人 |
RENESAS ELECTRONICS CORPORATION ;HITACHI ULSI SYSTEMS CO., LTD. |
发明人 |
NUMAZAWA Sumito;NAKAZAWA Yoshito;KOBAYASHI Masayoshi;KUDO Satoshi;IMAI Yasuo;KUBO Sakae;SHIGEMATSU Takashi;OHNISHI Akihiro;UESAWA Kozo;OISHI Kentaro |
分类号 |
H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
1. A method of manufacturing a semiconductor device including a MISFET, comprising steps of:
(a) forming a first trench in a semiconductor substrate, the first trench including a first portion and a second portion arranged near a top surface of the semiconductor substrate rather than the first portion such that the second portion has a sloping shape rather than first portion; (b) forming a gate insulating film of the MISFET over the semiconductor substrate including the first trench; (c) forming a gate electrode of the MISFET over the gate insulating film in order to be embedded in the first trench; (d) after the step (c), recessing the gate electrode such that an upper surface of the gate electrode is arranged at a position lower than the second portion; (e) after the step (d), recessing the gate insulating film such that an upper surface of the gate insulating film is arranged at a position lower than the second portion; and (f) after the step (e), forming a first insulating film over the gate electrode, the gate insulating film, the second portion and the top surface of the semiconductor substrate. |
地址 |
Kawasaki-shi JP |