发明名称 IGBT AND IGBT MANUFACTURING METHOD
摘要 An IGBT manufacturing method is provided. The IGBT has an n-type emitter region, a p-type top body region, an n-type intermediate region, a p-type bottom body region, an n-type drift region, a p-type collector region, trenches penetrating the emitter region, the top body region, the intermediate region and the bottom body region from an upper surface of a semiconductor substrate and reaching the drift region, and gate electrodes formed in the trenches. The method includes forming the trenches on the upper surface of the semiconductor substrate, forming the insulating film in the trenches, forming an electrode layer on the semiconductor substrate and in the trenches after forming the insulating film, planarizing an upper surface of the electrode layer, and implanting n-type impurities to a depth of the intermediate region from the upper surface side of the semiconductor substrate after planarizing the upper surface of the electrode layer.
申请公布号 US2015008479(A1) 申请公布日期 2015.01.08
申请号 US201214378366 申请日期 2012.02.14
申请人 Kato Takehiro;Onishi Toru 发明人 Kato Takehiro;Onishi Toru
分类号 H01L29/10;H01L29/66;H01L29/739 主分类号 H01L29/10
代理机构 代理人
主权项 1. An IGBT comprising: an n-type emitter region; a p-type top body region formed under the emitter region; an n-type intermediate region formed under the top body region; a p-type bottom body region formed under the intermediate region; an n-type drift region formed under the bottom body region; a p-type collector region in contact with the drift region; a plurality of trenches penetrating the emitter region, the top body region, the intermediate region and the bottom body region from an upper surface of a semiconductor substrate and reaching the drift region; and gate electrodes formed in the trenches, each of which faces the top body region, the intermediate region and the bottom body region located between the emitter region and the drift region via an insulating film, wherein upper surfaces of the gate electrodes are located at positions lower than upper ends of the trenches, a variation of a depth of a lower end of the intermediate region located between two gate electrodes is equal to or less than 110 nm and, the lower end of the intermediate region is a boundary between the n-type intermediate region and the p-type bottom body region.
地址 Toyota-shi JP