| 摘要 |
A low-inductance multilayer parallel plate capacitor in the form of a rectangular parallelepiped includes at least one pair of consecutive composite layers stacked parallel to each other in the vertical direction, each having a dielectric substrate and a conductor plate. Each conductor plate includes one or more lead portions to enable connection to terminations, and plates on consecutive composite layers are connected to terminations of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions that provide directionality to the currents flowing through the plates, resulting in a capacitor structure with greatly reduced inductance.
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