| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a highly noise-immune, high-precision duty adjustment circuit.SOLUTION: A plurality of clocked inverters CV1, CV2, CV4, CV8 are inserted in a propagation path of a clock signal and are connected in parallel with one another. Pull-up circuits UPs of the clocked inverters CV1, CV2, CV4, CV8 are independently controlled by control signals P11, P12, P14, P18 generated on the basis of a duty ratio of the clock signal, respectively, and pull-down circuits DNs of the clocked inverters CV1, CV2, CV4, CV8 are independently controlled by control signals N11, N12, N14, N18 generated on the basis of the duty ratio of the clock signal, respectively. According to the present invention, the parallel connection of the plurality of independently controlled clocked inverters can dispense with a fine adjustment of a bias level in changing the duty ratio of the clock signal passed therethrough.</p> |
