| 发明名称 |
SEMICONDUCTOR DEVICE SUPPRESSING BTI DETERIORATION |
| 摘要 |
Disclosed herein is a device includes a command generation circuit that activates first and second command signals, an internal circuit that includes a plurality of transistors that are brought into a first operation state when at least one of the first and second command signals is activated, and an output gate circuit that receives a first signal output from the internal circuit, the output gate circuit being configured to pass the first signal when the second command signal is deactivated and to block the first signal when the second command signal is activated. |
| 申请公布号 |
US2015003177(A1) |
申请公布日期 |
2015.01.01 |
| 申请号 |
US201414315951 |
申请日期 |
2014.06.26 |
| 申请人 |
Micron Technology, Inc. |
发明人 |
Fujishiro Keisuke |
| 分类号 |
G11C11/4078;G11C11/417;G11C11/4076;H03K3/037;H03K17/22 |
主分类号 |
G11C11/4078 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor device comprising:
a command generation circuit that activates first and second command signals; an internal circuit that includes a plurality of transistors that are brought into a first operation state when at least one of the first and second command signals is activated; and an output gate circuit that receives a first signal output from the internal circuit, the output gate circuit being configured to pass the first signal when the second command signal is deactivated and to block the first signal when the second command signal is activated. |
| 地址 |
Boise ID US |
